Safe reasoning with logic LTS

  • Previous work has introduced the setting of Logic LTS, together with a variant of ready simulation as fully-abstract refinement preorder, which allows one to compose operational specifications using a CSP-style parallel operator as well as the propositional connectives conjunction and disjunction. In this paper, we show how a temporal logic for specifying safety properties may be embedded into Logic LTS so that (a) the temporal operators are compositional for ready simulation and (b) ready simulation, when restricted to pairs of processes and formulas, coincides with the logic's satisfaction relation. The utility of this setting as a semantic foundation for mixed operational and temporal-logic specification languages is demonstrated via a simple example.

Download full text files

Export metadata

Statistics

Number of document requests

Additional Services

Share in Twitter Search Google Scholar
Metadaten
Author:Gerald LüttgenGND, Walter VoglerGND
URN:urn:nbn:de:bvb:384-opus4-10313
Frontdoor URLhttps://opus.bibliothek.uni-augsburg.de/opus4/1200
Series (Serial Number):Reports / Technische Berichte der Fakultät für Angewandte Informatik der Universität Augsburg (2008-18)
Type:Report
Language:English
Publishing Institution:Universität Augsburg
Release Date:2008/11/17
Institutes:Fakultät für Angewandte Informatik
Fakultät für Angewandte Informatik / Institut für Informatik
Fakultät für Angewandte Informatik / Institut für Informatik / Lehrstuhl für Softwaretechnik
Fakultät für Angewandte Informatik / Institut für Informatik / Lehrstuhl für Softwaretechnik / Professur für Theorie verteilter Systeme
Dewey Decimal Classification:0 Informatik, Informationswissenschaft, allgemeine Werke / 00 Informatik, Wissen, Systeme / 004 Datenverarbeitung; Informatik